Build your own silicon
Google is partnering with GlobalFoundries, SkyWater Technology and Efabless to provide fully open source Process Design Kits (PDKs) and toolchains so that any developer can create manufacturable silicon designs.
Every other month, you can submit your open source designs to be included in the OpenMPW shuttle program and get a chance to get them manufactured at no cost.
Get started
Pick a learning path that best corresponds to your skill set.
advanced
Bring your own GDS
Use your favorite tool to produce a GDS file that complies with the project harness specification.
bonus
Research more
Read academic papers and articles advancing the state of the art of open source silicon design.
Onboard onto the next shuttle
Create a project on Efabless and submit your design for inclusion in the next Open MPW shuttle.
Featured tools
Open source tools to accelerate silicon design.
Open Source PDKs
Open source process design kits maintained by Google.
OpenLane
Automated RTL to GDSII flow that performs full ASIC implementation steps from RTL all the way down to GDSII.
XLS
High Level Synthesis (HLS) toolchain which produces synthesizable designs from flexible, high-level descriptions of functionality.
Bazel Rules HDL
Bazel rules for Hardware Description Language (Verilog, VHDL, Chisel, nMigen, etc) with open tools (Yosys, Verilator, OpenROAD, etc).
Verible
Suite of SystemVerilog developer tools, including a parser, style-linter, and formatter.
CFU Playground
Framework for playing with custom opcodes to accelerate TensorFlow Lite for Microcontrollers.