Google is partnering with GlobalFoundries, SkyWater Technology and Efabless to provide fully open source Process Design Kits (PDKs) and toolchains so that any developer can create manufacturable silicon designs.

Every other month, you can submit your open source designs to be included in the OpenMPW shuttle program and get a chance to get them manufactured at no cost.

Get started

Pick a learning path that best corresponds to your skill set.
Get inspired by exploring projects from the previous shuttles.
Get familiar with the design-to-silicon flow.
Fork the project template to create a new digital design.
Explore the process technologies and their layers properties.
Use your favorite tool to produce a GDS file that complies with the project harness specification.
Read academic papers and articles advancing the state of the art of open source silicon design.
Create a project on Efabless and submit your design for inclusion in the next Open MPW shuttle.
Open source tools to accelerate silicon design.
Open source process design kits maintained by Google.
Automated RTL to GDSII flow that performs full ASIC implementation steps from RTL all the way down to GDSII.
High Level Synthesis (HLS) toolchain which produces synthesizable designs from flexible, high-level descriptions of functionality.
Bazel rules for Hardware Description Language (Verilog, VHDL, Chisel, nMigen, etc) with open tools (Yosys, Verilator, OpenROAD, etc).
Suite of SystemVerilog developer tools, including a parser, style-linter, and formatter.
Framework for playing with custom opcodes to accelerate TensorFlow Lite for Microcontrollers.